One type of prior art circuit for supplying current to relatively high power, inductive loads includes a DC source that is connected to a plurality of stacked power transistors. To simplify the exposition, it is assumed that two transistors are stacked between terminals of the DC source, but it is to be understood that any number of plural transistors can be stacked between terminals of the DC source. The pair of transistors is arranged so that emitter-collector paths thereof are in series across electrodes of the DC source. The transistors are driven by a reference so that only one of the transistors is supposed to conduct at a time. A load is connected in shunt with the emitter-collector path of one of the transistors, i.e., between one electrode of the DC source and a tap between the emitter-collector paths of the two transistors. The transistors are driven in an out-of-phase relationship by a variable pulse width waveform so current applied to the load has a close resemblance to a sinusoidal wave, due to filtering by the load.
It has been found that it is essential for the two stacked transistors never to conduct simultaneously. Simultaneous conduction of the two stacked transistors can have disastrous results on the DC power supply because the power supply is effectively short circuited by simultaneous conduction of the stacked transistors. However, because of various factors, such as lack of synchronization between the variable pulse width waveforms that drive the stacked transistors, the stacked transistors are occasionally inadvertently driven into simultaneous conduction.
In the past, simultaneous conduction of the stacked transistors has been avoided by sensing the current through the emitter-collector paths of the stacked transistors. In response to simultaneous current flow through the emitter-collector paths of the stacked transistors, a switching mechanism for the DC power supply is activated to disconnect the power supply from the stacked transistors and load. Such a sensing and switching arrangement has disadvantages relating to cost and complexity, but more important, disconnecting the power supply from the stacked transistors interrupts the supply of power to a load. Such an interruption can have adverse effects on the user of the load, and may require overt action on the part of an operator to resume power.
It is, accordingly, an object of the present invention to provide a new and improved circuit for preventing simultaneous conduction of a plurality of switched transistors that are connected in a stacked relation across terminals of a DC power supply to supply chopped current to an inductive load.
Another object of the invention is to provide a new and improved relatively inexpensive circuit for supplying chopped current to an inductive load from a DC source, wherein the circuit includes a plurality of transistors stacked between the source terminals, and which transistors are normally driven so that current is supplied to the load from the source through the emitter-collector path of at least one transistor during a first interval while the emitter-collector path of a second transistor is cut off, and current can flow from the load through the emitter-collector path of the second transistor during a second interval while the emitter-collector path of the first transistor is cut-off. An additional object of the invention is to provide a new and improved, relatively inexpensive and simple circuit for positively preventing the tendency for simultaneous, destructive currents to flow from a DC source through the emitter-collector paths of a plurality of stacked transistors which are normally activated so that they are alternately switched to supply chopped current to an inductive load.